Answer from cs61c-ei (Jing Chen 16669246) for Question 3
Verilog is a pretty neat hardware description language. I think structural verilog is by far the hardest because it deals with gates and tests your logic ability! However, I think it is also the most useful. I'm glad some projects required only structural because I was able to better understand how the ALU for instance could be translated directly to hardware. Dataflow and behavioral are much higher level and were easier to learn.