Answer from cs61c-aj (Kevin Li 15855812) for Question 1
It will work correctly only if the D flipflop has a legal output already set and not a nonstable one because output changes according to the input. So if initially the output Q is 1 then when the D flip-flop is triggered by the clock the input will be a 1 and then Q will be 1 and then it'll wait for the next clock trigger. This same reasoning goes for if Q is intially 0.