Quiz submission record for quiz4-2-1 at Tue Jul 13 22:40:56 2004:

Your Answer for Question 1:
To the C programmer, the arguments of a function are passed in order to the callee.  For example, if foo were defined as void(int x, char y), then a call to foo(a,b) would work only if a were an int and y were a char.  But in Verilog, function calls have parameters passed by name (.arg(value)) so that the parameters to the callee function can be in any order. 

Your Answer for Question 2:
reg CLK;
initial
   begin
   CLK = 1'b0;
   forever
     #2 CLK = ~CLK;
end

Your Answer for Question 3:
E = A*(B*not(C)) +  A*(C*not(B))

Every internal wire and inverted signal needs a wire.  There are two inversions so we need at least 2 wires.  (B*not(C)) and (C*not(B)) are hooked up to A by a wire so there are two more wires.  The OR in the middle requires two wires from each of these ANDs.  So in total, there needs to be 6 wires.


Your Answer for Question 4:
This code may not work as expected because $monitor prints when one of its inputs changes.  But in the second line, 3 inputs change at once without delay from the previous line.  $monitor may have problems printing the "current" value of a parameter since there was no delay.  Also, this circuit would probably fail in real life since there is no delay.


Your unique submission ID is quiz4-2-1-cs61c-cj-1089783656-2555.