Quiz submission record for quiz4-2-1 at Wed Jul 14 00:10:18 2004:

Your Answer for Question 1:
In C, arguments are passed by value. Not sure about Verilog

Your Answer for Question 2:
initial
   begin
         CLK = 1'b0;
         forever
           #2 CLK = ~CLK;
end


Your Answer for Question 3:
there are 6 wires, because we need the total of 4 AND gates, 2 converters, and 1 OR gate.

Your Answer for Question 4:
there's no #10 between the third and the four line, therefore the resuld maybe undefined because without it, those two line will be executed at the same time.


Your unique submission ID is quiz4-2-1-cs61c-co-1089789018-2953.