Quiz submission record for quiz4-2-1 at Wed Jul 14 10:10:53 2004:

Your Answer for Question 1:
In C, the caller function passes an argument to the callee function by value. It creates a copy of the value of the argument and passes it to the callee.

In Verilog, The ports that are sent to each callee module are bound to other signals for interconnection with other modules within the caller function.

Your Answer for Question 2:
initial
  begin
    #4 not (in0,in0);
end

Your Answer for Question 3:
5 wires = 2 ands per 3 input product, and 1 or.

Your Answer for Question 4:
Verilog does not execute every statement after the previous statement, and so both statements will occur at the same time. There is no way of knowing what the results will hold in this case.


Your unique submission ID is quiz4-2-1-cs61c-ef-1089825053-1845.