Quiz submission record for quiz5-1-2 at Tue Jul 20 01:14:43 2004:

Your Answer for Question 1:
c5 = g4 + (p4 . g3) + (p4 . p3 . g2) + (p4 . p3 . p2 . g1) + (p4 . p3 . p2 . p1 . g0) + (p4 . p3 . p2 . p1 . p0 . c0)

ci + 1 = gi + pi . ci

Your Answer for Question 2:
When ALUrc is asserted then the ALU will take the second operand from the sign-extended, lower 16-bits of the instruction. This is used for bne, lw and sw. When ALUrc is deasserted then the ALU will take the second operand from the register output. ALU will use the bit stored at the register coming out of read data 2. This is used for register and register functions such as add, sub, etc.

Your Answer for Question 3:
Xs means don't cares which means that no matter if its 0 or 1 the input or output will be the same for both 0 or 1 in place of Xs. 

o = !a + a.!c + !(a.c)

The table is complete because for all b and c where a is 0 is taken care by the first line. For a == 1, b can be anything and if c == 1 then o will be 0. For a == 1, b can be anything and if c == 0 then o will be 1. So for all cases no matter, a == 0 or 1, b == 0 or 1 and c == 0 or 1 is taken care of. 


Your unique submission ID is quiz5-1-2-cs61c-aj-1090311283-2125.