Answer from cs61c-av (Kenneth Wong 16192104) for Question 2
There is a stall due to a data hazard.  Since t0 is used in lw, delayed branching makes the instruction wait until t0 has been written in the fifth stage in order to have access to it in the add instruction.  Schemes used to reduce this delay are callled forwarding or bypassing.  The idea is that right after the load has taken place, we can suppply it as an input for subtract, thereby getting the item early from theinternal resources.