Answer from cs61c-ck (Allen Lee 16583554) for Question 2
That sequence of instructions causes problems because $t0 is used by add right after we load a value from memory into it - in pipelining, data isn't written back into the register until the 5th stage, but trailing instruction needs the data right before its 3rd stage.  This would mean that our program has to stall for a bit to wait for the value to be put into the reg file before using it.  We fix this by forwarding the value directly from the memory into the input to the ALU for the add instruction without passing it into the reg file.