Answer from cs61c-ee (Michael Shen 15963205) for Question 2
It can't run at full speed because one of the source operands in the second instruction depends on the target operand of the first instruction.  Thus, the second instruction is delayed three stages so that it can get the value from the register $t0.  We can fix this stall in the pipeline by connecting the output of the memory lookup of the first instruction to on of the inputs of the adder ALU of the second instruction. This way, we would only be delayed by 1 stage, rather than 3.