Quiz submission record for quiz5-2-2 at Thu Jul 22 07:24:27 2004:

Your Answer for Question 1:
A branch delay slot is the solution used by MIPS architecture. The branch delay slot always executes the next sequential instruction, with the branch taking place after that one instruction delay.

Your Answer for Question 2:
since lw doesn't write the result until the final stage, and add use $t0, add needs to wait until lw is done. We can use forwarding or bypassing to reduce the performance penalty.

Your Answer for Question 3:
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Your unique submission ID is quiz5-2-2-cs61c-ad-1090506267-2075.