Quiz submission record for quiz5-2-2 at Thu Jul 22 02:46:04 2004:

Your Answer for Question 1:
The branch delay spot is the instruction that follows a branch instruction.  It should be a relatively safe instruction, such as an add, rather than another branch instruction.  It serves to reduce hazards in pipelining.

Your Answer for Question 2:
The lw puts a value into register $t0 that is needed by the next instruction, however, the lw has not finished by the time the add instruction enters the pipe.  

Your Answer for Question 3:
Each section of the pipeline must use hardware that is independent of each other section of the pipeline, so this would prevent us from accessing memory for sw/lw and continuing with the next instruction at the same time.


Your unique submission ID is quiz5-2-2-cs61c-an-1090489564-2159.