Quiz submission record for quiz5-2-2 at Wed Jul 21 23:23:47 2004:

Your Answer for Question 1:
a branch delay slot is a space in the pipeline after a branch instruction is executed that is filled with a 'safe' instruction.  if a branch is in fact taken, it will take place in after that safe instruction.

Your Answer for Question 2:
this won't run at full speed because the second instruction depends on the first instruction.  therefore, the second instruction must wait for the lw before it can get the value of $t0 therefore causing a stall in the pipeline. the solution to this is called forwarding where you get the needed value as soon as it becomes available.  this however, still does not prevent stalls because you might still need to stall a pipeline while waiting for a value.   

Your Answer for Question 3:
if we only have one memory module, we could not use pipeling because the each instruction would occupy the memory module for the entire cycle. so one instruction could be writing data to memory while another one was trying to fetch data from the same memory.


Your unique submission ID is quiz5-2-2-cs61c-ao-1090477427-2079.