Quiz submission record for quiz5-2-2 at Thu Jul 22 10:50:58 2004:

Your Answer for Question 1:
This holds the instruction to be executed on a branch for an extra cycle, so after the branch comparison is calculated, the processor can decide if it needs to take the branch or not.  The delayed branch always executes the next sequential instruction, with the branch coming after that one instruction delay.

Your Answer for Question 2:
The instruction add requres the registers $t0, which are loaded in too late for the add instruction.  Thus, the hardware can use forwarding to help the situation, but even this might be too late.  Then, the programmer can reorder the code so that the next line of instruction after the lw can be something else and call the add instruction a few lines later.

Your Answer for Question 3:
The benefits of pipelining come from instruction thoroughput, being able to operate multiple instructions at once.  Thus, the processor must be able to load new instructions from the memory at the same time as operating on operands for a different instruction from the data memory.  By combining the 2 memories into 1, we no longer have this ability to multitask.


Your unique submission ID is quiz5-2-2-cs61c-ar-1090518658-2828.