Quiz submission record for quiz5-2-2 at Thu Jul 22 04:58:58 2004:

Your Answer for Question 1:
It is the single cycle delay immediatly after the conditional branch instruction. In clever implentations, instructions branch prediction can be used to reduce the branch penalty.

Your Answer for Question 2:
Special hardware is rrequired since the value of $t0 is used in the second instruction, but it isn't known until the first has completed. Forwarding could be implement to have the $t0 loaded into the execution stage of the second instruction. In software, the compiler could reorder the instructions, without changing the output, to make pipelining work more efficientl.

Your Answer for Question 3:
The instruction fetch portion of one instruction would block the memory access portion of another instruction in the pipeline. 


Your unique submission ID is quiz5-2-2-cs61c-cm-1090497538-2168.