Quiz submission record for quiz5-2-2 at Wed Jul 21 17:42:22 2004:

Your Answer for Question 1:
a branch delay slot is where the MIPS software will place an instruction immediately after the delayed branch instruction that is not affected by the branch, and a taken branch changes the address of the instruction that follows this safe instruction. It serves add function.

Your Answer for Question 2:
Because we have to wait for the first instruction to get to the fifth stage to write it result, then we can use that the result for the second instruction. We can use fowarding or bypassing to reduce the performance penalty.

Your Answer for Question 3:
huh? i'm not sure i know wat the question asking.


Your unique submission ID is quiz5-2-2-cs61c-co-1090456942-2484.