Quiz submission record for quiz5-2-2 at Wed Jul 21 16:47:47 2004:

Your Answer for Question 1:
The slot directly after a delayed branch instruction. This is filled by an instruction that does not affect the branch. Essentially if the branch is not taken this is instruction that has to be executed. 

Your Answer for Question 2:
Because register $t0 holds memory that was loaded in the previous instruction. Thus we cannot jump ahead in the pipelining procedure since add depends on the value of $t0. We could force software to use delayed loads. 

Your Answer for Question 3:
IF we are doing a write to memory and a read from register at the sametime but in regards to two different instructions then our pipelining will create an unstable situation. 


Your unique submission ID is quiz5-2-2-cs61c-eg-1090453667-1410.