Quiz submission record for quiz5-2-2 at Thu Jul 22 10:23:57 2004:

Your Answer for Question 1:
The branch delay slot is the slot right after a delayed branch instruction and is an instruction that does not affect the branch. Its function is to fill the time that a before a delayed branch is taken, so that we can fill the dead time by executing as many instructions as possible. 

Your Answer for Question 2:
Because lw is the critical path in the datapath, we'd have to wait until the very end of the instruction when 0($s1) is written into $t0 before we can execute the next instruction. To reduce the performance penalty, we can insert other instructions into the datapath while we are waiting for $t0 to come out, as long as they do not affect the load word. 

Your Answer for Question 3:
This would break because we would not be able to fetch the next instruction since we would need the same memory module to store the results from the ALU / reg read. Therefore, the pipelining scheme would no longer work since we couldn't load up the next instruction while we're still working on the current one. 


Your unique submission ID is quiz5-2-2-cs61c-ep-1090517037-395.