Quiz submission record for quiz5-2-2 at Thu Jul 22 00:52:44 2004:

Your Answer for Question 1:
The branch delay slot is the slot for the instruction immediately following a branch instruction. The assembler places instructions not affected by the branch in the branch delay slot so that time is not wasted while the branch is being evaluated.

Your Answer for Question 2:
Because the add instruction must wait for the word loaded from the memory address in $s1 to be written to register $t0 before it can use $t0 in its addition. The solution is to use forwarding.

Your Answer for Question 3:
Because when we pipeline the data-path, we create a 5-stage pipeline. The whole concept of pipelining relies on being able to utilize all components of the datapath simultaneously for different instructions so that no component is not in use when it could be. By merging the data memory and the instruction memory into one module, that module can only be used by one instruction at a time instead of the data memory being used by one instruction and the instruction memory being used by another one. Thus the pipeline is destroyed.


Your unique submission ID is quiz5-2-2-cs61c-fz-1090482764-1469.