Answer from cs61c-ei (Jing Chen 16669246) for Question 3
The hazard detection unit operations during the ID stage so that it can insert a stall between the load and its use. It first tests to see if the instruction is a load since the only instruction that reads data memory is a load. It then checks to see if the destination register field of the load in the EX stage matches either source register of the instruction in the ID stage. If this is true, then the instruction stalls 1 clock cycle. The fact that one stall essentially is like the equivalent of adding a nop (sll $0, $0, 0) and shifts all other instructions down prevents the hazard unit from repeatedly inserting the same bubble.