Quiz submission record for quiz6-1-1 at Mon Jul 26 09:52:19 2004:

Your Answer for Question 1:
Everytime an instruction is decoded, it has new values for the control signals. if the control wasn't pipelined, these values would override the control signal values for the previous instruction. 
To save the control signal values for a particular instruction we need the control to be piped. as and when the instruction reaches a particular phase, the control signals for that phase are 'peeled off' and used. 

Your Answer for Question 2:
The topmost bus chooses between the new register's value, the value from a previous register that has just been stored in memory and the value of a previous instruction that has just been calculated by the ALU. depending on the whether the first register needs a value to be forwarded to it, one of the three muxes is picked. 

if we choose the 1st case, that means instruction two has no dependency on instruction one:
addi $t3, $s0, 1
addi $t4, $t2, 2

if we choose the second case, we're using the value from an instruction 2 steps away
lw $t0, 0($sp)
sll $0, $0, $0
addi $t0, $t2, 1

if we choose the third case, we're using the newly formed result output from the alu (forwarding)

add $t0, $0, $t3
addi $t3, $t3, 1

Your Answer for Question 3:
to delay the evaluation of an instruction, the hazard unit makes the instruction repeat one of its clock cycle processes again, eg: it might reread its values. 

repeating bubbles of this sort could lead to some problems if they are repeating many times. in the example i gave, if we reread the values for 3 or 4 cycles, we might end up with a different value for one of the operands, because, maybe the operand was written into by another instruction, during this time. 


Your unique submission ID is quiz6-1-1-cs61c-aq-1090860739-2140.