Answer from cs61c-ad (maung maung aung 16764789) for Question 2
If we use the number of entries in the cache is a power of two, then it is easy to represent the lower order bits of the address by taking modulo of 2. Then cache can access with the lower-order bit. If we use higher-order bit, it is not easy take modulo of 2 while the lower-order bit is.