Answer from cs61c-cb (minh uyen nguyen 16765774) for Question 2
I think it's the convention.  However, the reason for that is because choosing a certain set of bits as index for the cache will result in faster speed of the searching process.  Besides, the leftmost bits are chosen to be tags.

The bits correspond to the index are used to select unique entry in the cache corresponding to the supply address, thus we only need to ensure that the upper portion of the supplied address matches the tag.

We don't use the leftmost bits because the addresses of consecutive blocks are very close to each other, therefore, there will be a repetition of the rightmost bit pattern somehow amongs those addresses.  This is an advantage when choosing the index.

However, the explanation in the book doesn't quite convince me.  I understand memory address is word alligned.  Thus, the number of entries in the cache is a power of two, then "block modulo number of cache blocks in the cache" can be computed simply by using only the lower order log2 and th cache may be accessed directly with low-order bits.