Answer from cs61c-ew (Joo-Rak Son 16103505) for Question 1
The EPC register holds the address of the affected instruction. The cause register holds the cause of the exception. Especially, the low two bits hold the exceptions caused by undefined instruction and arithmetic overflow. These registers are in coprocessor0, the part of the CPU that handles interrupts. mfco $k0, $13 and mfco $k1, $13 move these registers into $k0 and $k1.