Quiz submission record for quiz6-2-2 at Thu Jul 29 10:59:37 2004:

Your Answer for Question 1:
It holds the address of the instruction that caused the exception.  The Cause register is used to hold the "cause" of the exception; it points to the address of an exception register.  MIPS instructions that are undefined or arithmetic overflows lead to these exceptions.

Your Answer for Question 2:
These are exceptions that do not necessarily pair the correct exception with the correct instruction.  With imprecise exceptions, because pipelining occurs in stages, an exception may actually be pointing to a few instructions away from the real problem. 

Your Answer for Question 3:
It can waste a lot of processer time, since processors are much faster than I/0 devices.

Your Answer for Question 4:
The I/0 devices are directly addressed to in memory, reducing the effects of polling.


Your unique submission ID is quiz6-2-2-cs61c-ar-1091123977-2085.