Quiz submission record for quiz6-2-2 at Thu Jul 29 10:47:35 2004:

Your Answer for Question 1:
The EPC register holds the address of the affected instruction. The cause register holds the cause of the exception. Especially, the low two bits hold the exceptions caused by undefined instruction and arithmetic overflow. These registers are in coprocessor0, the part of the CPU that handles interrupts. mfco $k0, $13 and mfco $k1, $13 move these registers into $k0 and $k1.

Your Answer for Question 2:
Because of the difficulty of always associating the correct exception with the correct instruction in pipelined computers, computer designers simplicated the noncritical exception cases as  imprecise exceptions.

Your Answer for Question 3:
It can waste a lot of processor time becausee processors are so much faster than I/O devices. While I/O devices are busy carrying out their process, the processor has to come check the Status register many times until the operation is complete and is successful.

Your Answer for Question 4:
Memory-mapped means that each register appears as a special memory location. In the books example, there are registers like receiver control, receiver data, transmitter control and transmitter data.

MIPS loop
li $t0, 0xffff0000
li $t1, 0xffff0004 #receiver's address.
tryagain:
lw $t0, 0($t0)
sll $t0, $t0, 31 # Only consider the rightmost bit.
beq $t0, $0, tryagain # Keep polling until ready.
lw $t1, 0($t1) # Received data.


Your unique submission ID is quiz6-2-2-cs61c-ew-1091123255-227.